Configurable hysteresis trigger for single or multi-channel in LabVIEW FPGA

<div class="body"><div class="plain">This example uses basic logic, simple comparisons, and a state machine to implement a hysteresis trigger in a LabVIEW FPGA application.  This example will not workwithin a Single-Cycle Timed Loop, as it monitors an analog input channel as the input to the hysteresis trigger.The example implements a two-channel, configurable hysteresis trigger with the option to implement a logic combination trigger (i.e. if trigger 1 and trigger 2, then combo trigger on).The example makes use of the hysteresis trigger IP core which receives the trigger configuration and the channel data, and then outputs a boolean signal if the trigger conditions are true.</div></div>